AMD Instinct MI300X Platform
Official AMD accelerator platform record.
official · 2026-08-28AMD data-center portfolio announcement ↗Data center platform · source-linked
Official AMD accelerator platform record.
official · 2026-08-28AMD data-center portfolio announcement ↗AMD states the platform uses an industry-standard UBB 2.0 design with eight accelerators.
official · 2026-08-28AMD data-center portfolio announcement ↗AMD lists the OAM form factor and PCIe Gen5 ×16 interface.
official · 2026-08-28AMD Instinct MI300X data sheet ↗AMD documentation lists eight XCDs, paired and 3D-stacked on IODs.
official · 2026-08-28AMD Instinct MI300X architecture overview ↗Four IODs form the base for paired 3D-stacked XCDs.
official · 2026-08-28AMD Instinct MI300X architecture overview ↗AMD publishes 5 nm lithography; the selected sources do not name the foundry.
official · 2026-08-28AMD Instinct MI300X data sheet ↗AMD publishes 6 nm lithography for the IOD; no foundry is asserted here.
official · 2026-08-28AMD Instinct MI300X data sheet ↗AMD states 192 GB HBM3 per accelerator and eight stacks; supplier allocation is not disclosed.
official · 2026-08-28AMD data-center portfolio announcement ↗A process node does not authorize VLSI Inside to infer a foundry.
undisclosed · 2026-08-28AMD INSTINCT MI300X PLATFORM │ ├─ PUBLICLY NAMED SILICON / PLATFORM │ └─ AMD describes MI300X accelerator with 8 accelerator dies and 8 HBM3 stacks in its architecture presentation. │ └─ EXPLICIT UNKNOWNS └─ HBM supplier, substrate/package assembly partner, fab/node and server BOM unknown.