Current company investment disclosures
4040 tracked companiesEach record remains attached to its financing-event or company-capital-backer scope and controlling announcement date.
A press-facing desk for source-linked foundry and startup-capital facts, scope-aware comparisons, downloadable data, and direct controlling documents. Every number keeps its period, unit, reporting basis, and evidence status.
The startup monitor now connects each covered investment disclosure to investors named in its controlling public announcement. Financing-event participation and company-level capital-backer disclosure stay separate; neither implies check size, ownership, board rights, current mandate, or a complete portfolio.
Each record remains attached to its financing-event or company-capital-backer scope and controlling announcement date.
Names and roles reproduce the round-level disclosure without inferring an investor's wider portfolio.
Missing names and individual check sizes stay undisclosed rather than becoming zero.
These are reported or transparently scoped observations, not recommendations. Open the controlling source before publication and preserve the evidence label in any secondary chart or article.
Gross profit was US$138M; Q3 revenue guidance is a separate US$520M midpoint with a ±5% range.
Gross margin was 67.7%, operating margin 60.3%, and 2nm represented 3% of wafer revenue.
The operating-segment total includes intersegment transactions and is not ranked with pure-play company revenue.
Utilization was 85%, 22/28nm represented 37% of revenue, and wafer shipments rose 10.6% QoQ.
Advanced technologies reached 74% of wafer revenue; 3nm alone was 24%.
Standard-logic 8-inch-equivalent wafers; revenue rose 16.2% while ASP fell to US$907 per equivalent wafer.
The US$17.826B segment total consists substantially of intersegment manufacturing revenue.
Reported 300 mm-equivalent wafer shipments for FY2025.
Technology announcements can explain a cycle but do not prove revenue, yield, customer volume, or market share. Reported milestones and forward guidance remain distinct in this feed.
| Company | Period | Milestone | Evidence | Editorial context | Source |
|---|---|---|---|---|---|
| TSMC | Q2 2026 | 2nm entered the reported wafer-revenue mix | reported | TSMC reported 2nm at 3% of Q2 wafer revenue; the process mix is company-specific and is not a foundry market-share estimate. | Official document |
| Intel Foundry | Q2 2026 | Intel 18A-P entered risk production | reported | The earnings release describes the milestone as risk production, not customer volume, yield, revenue, or high-volume manufacturing. | Official document |
| Intel Foundry | Q2 2026 | A subset of Panther Lake entered high-volume manufacturing | reported | Intel limited the statement to a subset of Core Ultra Series 3 processors and did not disclose external-customer wafer volume. | Official document |
| UMC | Jul 2026 approval | Singapore cleanroom and Tainan fab expansion approved | guidance | UMC approved phased Singapore P4 cleanroom/tool expansion and a new Tainan building shell; the revised FY2026 capex budget is US$2.0B guidance. | Official document |
| Tower | Jul 14, 2026 | Japan SiPho, SiGe and optical-packaging expansion announced | guidance | Tower described a dual-track plan with Q4 2027 production readiness for the first track and a multi-fold capacity target for the second; both remain forward-looking. | Official document |
| TSMC | Q4 2025 | 2nm entered high-volume manufacturing | reported | TSMC reported good yield and expects a fast 2026 ramp; N2P and A16 remain scheduled for H2 2026. | Official document |
| Samsung Foundry | Q3 2025 | First-generation 2nm GAA mass production started | reported | Revenue remains undisclosed, so technology progress is not converted into a market-share estimate. | Official document |
| Intel Foundry | FY2025 | Intel 18A ramped into high-volume production | reported | Intel identifies 18A as its first significant node for government and enterprise foundry customers. | Official document |
| SMIC | Dec 2025 | Monthly capacity passed 1M 8-inch-equivalent wafers | reported | Year-end monthly capacity reached 1,058,750; FY2025 shipments rose 20.9% to 9.697M on the same basis. | Official document |
| Tower | 2027 target | Silicon-photonics capacity targeted above 5× Q4 2025 run-rate | guidance | The target is guidance backed by a stated US$920M SiPho/SiGe investment program, not current capacity. | Official document |
Use the full extract for exploratory analysis or request one dataset and company at a time. Unavailable values carry a status and reason; their numeric field remains blank rather than zero.
Retain the title, data-through period, publisher, publication date, and URL.
VLSI Market, “Global Foundry Monitor,” data through Q2 2026 latest results · FY2025 annual baseline, published August 5, 2026, VLSI Korea, https://market.vlsi.kr/foundry.JSON preserves nested contracts; CSV provides a long-form analysis table.
Intel Foundry segment revenue principally reflects intersegment manufacturing. Samsung does not report standalone Foundry revenue. Neither should appear as a directly comparable pure-play revenue observation.
Read the full comparison rules →Use these URLs instead of a screenshot so readers can inspect definitions.
The watch checks for official publication changes. A daily check does not mean a company published a new observation that day; the last validated snapshot remains available when an upstream document fails.
Daily source watch; ingest after official monthly release
Daily filing watch; ingest only after an official result or exchange filing appears
Schema, units, scope, duplicate, range, and source-link checks before publish
Open the original filing or result alongside the VLSI Market extract. The official definition controls whenever a summary and source appear to differ.
Audited financial statements, earnings releases, presentations, and management commentary
Open official source ↗Audited revenue, wafer shipments, annual capacity, process mix, customer count, and technology milestones
Open official source ↗Q2 2026 revenue, margins, wafer shipments, and process-node revenue mix
Open official source ↗Intel Foundry segment revenue, third-party external revenue, operating result, and process milestones
Open official source ↗Q2 2026 Intel Foundry segment revenue and Intel 18A-P / Panther Lake manufacturing milestones
Open official source ↗Annual and quarterly revenue, margins, cash flow, and 300 mm-equivalent wafer shipments
Open official source ↗Q2 2026 revenue, process mix, utilization, wafer-shipment growth, 2026 capex, and approved expansion plan
Open official source ↗Audited revenue, wafer shipments, 8-inch-equivalent capacity, ASP, and operating metrics
Open official source ↗Annual and quarterly revenue, profitability, capital expenditure, and specialty-platform investment
Open official source ↗Q2 2026 consolidated revenue and gross profit plus separately labeled Q3 2026 revenue guidance
Open official source ↗July 2026 plan for 300mm silicon-photonics, silicon-germanium, and advanced optical-packaging expansion
Open official source ↗Audited FY2023–FY2025 Design Automation and Design IP segment revenue and Ansys acquisition perimeter
Open official source ↗Audited FY2023–FY2025 company revenue, rounded product-group revenue shares, and one-operating-segment disclosure
Open official source ↗FY2024–FY2025 Digital Industries software-business revenue and acquisition perimeter
Open official source ↗Audited FY2024–FY2026 license-and-other, royalty, and total revenue
Open official source ↗A compact public record of material dataset and methodology releases.
Added Microchip's July 24 definitive acquisition agreement and changed Hailo from active-private to pending acquisition. The transaction remains subject to approvals and customary closing conditions; undisclosed consideration stays blank and is never converted to zero, financing, or a live valuation.
Added Tower's SEC-filed US$460 million Q2 revenue and US$138 million gross profit as actual observations. The US$520 million Q3 revenue midpoint and ±5% range remain separately labeled guidance and never enter the FY2025 pure-play ranking or a reported-sales total.
Separated direct Synopsys Design Automation segment evidence from Cadence total-company and Siemens Digital Industries software context. Added Arm licensing-and-other and royalty revenue, Synopsys Design IP segment revenue, Cadence's rounded Semiconductor IP revenue share, and explicit Siemens non-disclosure. No rounded percentage is converted to dollars and no broad software metric is relabeled as EDA or semiconductor-IP revenue.
Published 40 current company investment disclosures, 207 named investor entities, and 244 source-linked named relationships. 38 records name at least one investor relationship; the remaining 2 explicitly retain issuer nondisclosure. One company-level capital-backer disclosure remains distinct from financing-event participation. Check size, ownership, current mandate, and complete portfolio coverage are not inferred.
Expanded the active-private semiconductor startup snapshot from 20 to 30 source-linked companies and added search, evidence and freshness facets, transparent match reasons, local saved lists, three-company comparison, capital timelines, and a licensed-aware research network. Debt, grants, strategic investment, equity, cumulative funding, and valuation remain separate fact classes.
Added source-linked Samsung, SK hynix, Micron, TSMC, Intel, UMC, Synopsys, Cadence, Siemens, and Tower updates as separate quarterly or event records. Six official NVIDIA and Intel launch references now open directly in the selected-product terminal. FY2025 annual comparisons and the then-current 180-node technology taxonomy were retained unchanged.
Advanced ten company profiles to newer verified technology, deployment, commercialization, and governance coverage without changing any financing, valuation, or active-status field.
Added FY2025 revenue, normalized wafer shipments, operating disclosures, technology signals, source registry links, CSV export, and explicit Intel and Samsung scope treatment.